#include "chips.h"

const struct RiscVChip_s ch32v003 = {
	.name_str = "CH32V003",
	.family_id = CHIP_CH32V003,
	.model_id = 0x0030,
	.ram_base = 0x20000000,
	.ram_size = 2048,
	.sector_size = 64,
	.flash_offset = 0x08000000,
	.flash_size = 16*1024,
	.bootloader_offset = 0x1FFFF000,
	.bootloader_size = 1920,
	.options_offset = 0x1FFFF800,
	.options_size = 0x40,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32v002 = {
	.name_str = "CH32V002",
	.family_id = CHIP_CH32V00x,
	.model_id = 0x0020,
	.ram_base = 0x20000000,
	.ram_size = 4096,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 16*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32v004 = {
	.name_str = "CH32V004",
	.family_id = CHIP_CH32V00x,
	.model_id = 0x0040,
	.ram_base = 0x20000000,
	.ram_size = 6*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 32*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32v005 = {
	.name_str = "CH32V005",
	.family_id = CHIP_CH32V00x,
	.model_id = 0x0050,
	.ram_base = 0x20000000,
	.ram_size = 6*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 32*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32v006 = {
	.name_str = "CH32V006",
	.family_id = CHIP_CH32V00x,
	.model_id = 0x0060,
	.ram_base = 0x20000000,
	.ram_size = 8*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 62*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32v007 = {
	.name_str = "CH32V007",
	.family_id = CHIP_CH32V00x,
	.model_id = 0x0070,
	.ram_base = 0x20000000,
	.ram_size = 8*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 62*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32x033 = {
	.name_str = "CH32x033",
	.family_id = CHIP_CH32X03x,
	.model_id = 0x0330,
	.ram_base = 0x20000000,
	.ram_size = 20*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 62*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x235a,
};

const struct RiscVChip_s ch32x035 = {
	.name_str = "CH32x035",
	.family_id = CHIP_CH32X03x,
	.model_id = 0x0350,
	.ram_base = 0x20000000,
	.ram_size = 20*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 62*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x235f,
};

const struct RiscVChip_s ch32v103 = {
	.name_str = "CH32V103",
	.family_id = CHIP_CH32V10x,
	.model_id = 0x2500,
	.ram_base = 0x20000000,
	.ram_size = 20*1024,
	.sector_size = 128,
	.flash_offset = 0x08000000,
	.flash_size = 64*1024,
	.bootloader_offset = 0x1FFFF000,
	.bootloader_size = 2048,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.no_autoexec = 1,
	.isp_id_mask = 0x153f,
};

const struct RiscVChip_s ch32l103 = {
	.name_str = "CH32L103",
	.family_id = CHIP_CH32L103,
	.model_id = 0x1030,
	.ram_base = 0x20000000,
	.ram_size = 20*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 64*1024,
	.bootloader_offset = 0x1FFFF000,
	.bootloader_size = 2048,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x253f,
};

const struct RiscVChip_s ch32v203 = {
	.name_str = "CH32V203",
	.family_id = CHIP_CH32V20x,
	.model_id = 0x2030,
	.ram_base = 0x20000000,
	.ram_size = 64*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 224*1024,
	.bootloader_offset = 0x1FFF8000,
	.bootloader_size = 28*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x193f,
};

const struct RiscVChip_s ch32v205 = {
	.name_str = "CH32V205",
	.family_id = CHIP_CH32V205,
	.model_id = 0x2050,
	.ram_base = 0x20000000,
	.ram_size = 32*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 256*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3*1024+256,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32v208 = {
	.name_str = "CH32V208",
	.family_id = CHIP_CH32V20x,
	.model_id = 0x2080,
	.ram_base = 0x20000000,
	.ram_size = 64*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 480*1024,
	.bootloader_offset = 0x1FFF8000,
	.bootloader_size = 28*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x198f,
};

const struct RiscVChip_s ch32v303 = {
	.name_str = "CH32V303",
	.family_id = CHIP_CH32V30x,
	.model_id = 0x3030,
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 480*1024,
	.bootloader_offset = 0x1FFF8000,
	.bootloader_size = 28*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x173f,
};

const struct RiscVChip_s ch32v305 = {
	.name_str = "CH32V305",
	.family_id = CHIP_CH32V30x,
	.model_id = 0x3050,
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 480*1024,
	.bootloader_offset = 0x1FFF8000,
	.bootloader_size = 28*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x175f,
};

const struct RiscVChip_s ch32v307 = {
	.name_str = "CH32V307",
	.family_id = CHIP_CH32V30x,
	.model_id = 0x3070,
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 480*1024,
	.bootloader_offset = 0x1FFF8000,
	.bootloader_size = 28*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x177f,
};

const struct RiscVChip_s ch32v317 = {
	.name_str = "CH32V317",
	.family_id = CHIP_CH32V30x,
	.model_id = 0x3170,
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 480*1024,
	.bootloader_offset = 0x1FFF8000,
	.bootloader_size = 28*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_UNSUPPORTED,
};

const struct RiscVChip_s ch32h415 = {
	.name_str = "CH32H415",
	.family_id = CHIP_CH32H41x,
	.model_id = 0x4150,
	.ram_base = 0x200a0000,
	.ram_size = 896*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 960*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 56*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32h416 = {
	.name_str = "CH32H416",
	.family_id = CHIP_CH32H41x,
	.model_id = 0x4160,
	.ram_base = 0x200a0000,
	.ram_size = 896*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 480*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 56*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32h417 = {
	.name_str = "CH32H417",
	.family_id = CHIP_CH32H41x,
	.model_id = 0x4170,
	.ram_base = 0x200a0000,
	.ram_size = 896*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 960*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 56*1024,
	.options_offset = 0x1FFFF800,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch32m030 = {
	.name_str = "CH32M030",
	.family_id = CHIP_CH32M030,
	.model_id = 0x0300,
	.ram_base = 0x20000000,
	.ram_size = 12*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 64*1024,
	.bootloader_offset = 0,
	.bootloader_size = 0,
	.options_offset = 0x1FFFF300,
	.options_size = 128,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_UNSUPPORTED,
};

const struct RiscVChip_s ch564 = {
	.name_str = "CH564",
	.family_id = CHIP_CH564,
	.model_id = 0x6400,
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 32*1024,
	.options_offset = 0,
	.options_size = 0,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_UNSUPPORTED,
};

const struct RiscVChip_s ch564c = {
	.name_str = "CH564C",
	.family_id = CHIP_CH564,
	.model_id = 0x64c0, // Totally speculation
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_offset = 0x00000000,
	.flash_size = 192*1024,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 32*1024,
	.options_offset = 0,
	.options_size = 0,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_UNSUPPORTED,
};

const struct RiscVChip_s ch565 = {
	.name_str = "CH565",
	.family_id = CHIP_CH56x,
	.model_id = 0x6500,
	.ram_base = 0x20000000,
	.ram_size = 16*1024,
	.sector_size = 256,
	.flash_offset = 0x00000000,
	.flash_size = 448*1024,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 32*1024,
	.options_offset = 0,
	.options_size = 0,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_UNSUPPORTED,
	.isp_id_mask = 0x1165,
};

const struct RiscVChip_s ch569 = {
	.name_str = "CH569",
	.family_id = CHIP_CH56x,
	.model_id = 0x6900,
	.ram_base = 0x20000000,
	.ram_size = 16*1024,
	.sector_size = 256,
	.flash_offset = 0x00000000,
	.flash_size = 448*1024,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 32*1024,
	.options_offset = 0,
	.options_size = 0,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_UNSUPPORTED,
	.isp_id_mask = 0x1169,
};

const struct RiscVChip_s ch570 = {
	.name_str = "CH570",
	.family_id = CHIP_CH570,
	.model_id = 0x7000,
	.ram_base = 0x20000000,
	.ram_size = 12*1024,
	.sector_size = 4096,
	.flash_offset = 0x00000000,
	.flash_size = 240*1024,
	.eeprom_offset = 0,
	.eeprom_size = 0,
	.bootloader_offset = 0x0003C000,
	.bootloader_size = 8*1024,
	.options_offset = 0x0003E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.isp_id_mask = 0x1370,
};

const struct RiscVChip_s ch571 = {
	.name_str = "CH571",
	.family_id = CHIP_CH57x,
	.model_id = 0x7100,
	.ram_base = 0x20003800,
	.ram_size = 18*1024,
	.sector_size = 256,
	.flash_offset = 0x00000000,
	.flash_size = 192*1024,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1371,
};

const struct RiscVChip_s ch572 = {
	.name_str = "CH572",
	.family_id = CHIP_CH570,
	.model_id = 0x7200,
	.ram_base = 0x20000000,
	.ram_size = 12*1024,
	.sector_size = 4096,
	.flash_offset = 0x00000000,
	.flash_size = 240*1024,
	.eeprom_offset = 0,
	.eeprom_size = 0,
	.bootloader_offset = 0x0003C000,
	.bootloader_size = 8*1024,
	.options_offset = 0x0003E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.isp_id_mask = 0x1372,
};

const struct RiscVChip_s ch573 = {
	.name_str = "CH573",
	.family_id = CHIP_CH57x,
	.model_id = 0x7300,
	.ram_base = 0x20003800,
	.ram_size = 18*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1373,
};

const struct RiscVChip_s ch573q = {
	.name_str = "CH573Q",
	.family_id = CHIP_CH57x,
	.model_id = 0x7300,
	.ram_base = 0x20003800,
	.ram_size = 18*1024,
	.sector_size = 256,
	.flash_size = 192*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
};

const struct RiscVChip_s ch581 = {
	.name_str = "CH581",
	.family_id = CHIP_CH58x,
	.model_id = 0x8100,
	.ram_base = 0x20000000,
	.ram_size = 32*1024,
	.sector_size = 256,
	.flash_size = 192*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1681,
};

const struct RiscVChip_s ch582 = {
	.name_str = "CH582",
	.family_id = CHIP_CH58x,
	.model_id = 0x8200,
	.ram_base = 0x20000000,
	.ram_size = 32*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1682,
};

const struct RiscVChip_s ch583 = {
	.name_str = "CH583",
	.family_id = CHIP_CH58x,
	.model_id = 0x8300,
	.ram_base = 0x20000000,
	.ram_size = 32*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1683,
};

const struct RiscVChip_s ch584 = {
	.name_str = "CH584",
	.family_id = CHIP_CH585,
	.model_id = 0x8400,
	.ram_base = 0x20000000,
	.ram_size = 96*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1684,
};

const struct RiscVChip_s ch585 = {
	.name_str = "CH585",
	.family_id = CHIP_CH585,
	.model_id = 0x9300,
	.ram_base = 0x20000000,
	.ram_size = 128*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x02,
	.protocol = PROTOCOL_CH5xx,
	.no_autoexec = 1,
	.isp_id_mask = 0x1685,
};

const struct RiscVChip_s ch591 = {
	.name_str = "CH591",
	.family_id = CHIP_CH59x,
	.model_id = 0x9100,
	.ram_base = 0x20000000,
	.ram_size = 26*1024,
	.sector_size = 256,
	.flash_size = 192*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.isp_id_mask = 0x2291,
};

const struct RiscVChip_s ch592 = {
	.name_str = "CH592",
	.family_id = CHIP_CH59x,
	.model_id = 0x9200,
	.ram_base = 0x20000000,
	.ram_size = 26*1024,
	.sector_size = 256,
	.flash_size = 448*1024,
	.flash_offset = 0x00000000,
	.eeprom_offset = 0x00070000,
	.eeprom_size = 32*1024,
	.bootloader_offset = 0x00078000,
	.bootloader_size = 24*1024,
	.options_offset = 0x0007E000,
	.options_size = 8*1024,
	.interface_speed = 0x03,
	.protocol = PROTOCOL_CH5xx,
	.isp_id_mask = 0x2292,
};

const struct RiscVChip_s ch641 = {
	.name_str = "CH641",
	.family_id = CHIP_CH641,
	.model_id = 0x6410,
	.ram_base = 0x20000000,
	.ram_size = 2048,
	.sector_size = 64,
	.flash_offset = 0x08000000,
	.flash_size = 16*1024,
	.bootloader_offset = 0x1FFFF000,
	.bootloader_size = 1920,
	.options_offset = 0x1FFFF800,
	.options_size = 0x40,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
};

const struct RiscVChip_s ch643 = {
	.name_str = "CH643",
	.family_id = CHIP_CH643,
	.model_id = 0x6430,
	.ram_base = 0x20000000,
	.ram_size = 20*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 62*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_DEFAULT,
	.isp_id_mask = 0x243f,
};

const struct RiscVChip_s ch645 = {
	.name_str = "CH645",
	.family_id = CHIP_CH645,
	.model_id = 0x6450,
	.ram_base = 0x20000000,
	.ram_size = 80*1024,
	.sector_size = 256,
	.flash_offset = 0x08000000,
	.flash_size = 224*1024,
	.bootloader_offset = 0x1FFF0000,
	.bootloader_size = 3328,
	.options_offset = 0x1FFFF800,
	.options_size = 256,
	.interface_speed = 0x01,
	.protocol = PROTOCOL_UNSUPPORTED,
};

const struct RiscVChip_s * chip_collection[] = {
	&ch32v003,
	&ch32v002,
	&ch32v004,
	&ch32v005,
	&ch32v006,
	&ch32v007,
	&ch32x033,
	&ch32x035,
	&ch32v103,
	&ch32l103,
	&ch32v203,
	&ch32v205,
	&ch32v208,
	&ch32v303,
	&ch32v305,
	&ch32v307,
	&ch32v317,
	&ch32h415,
	&ch32h416,
	&ch32h417,
	&ch564,
	&ch564c,
	&ch565,
	&ch569,
	&ch570,
	&ch571,
	&ch572,
	&ch573,
	&ch581,
	&ch582,
	&ch583,
	&ch585,
	&ch591,
	&ch592,
	&ch641,
	&ch643,
	&ch645,
	0,
};

const struct RiscVChip_s* FindChip(uint32_t chip_id)
{
	const struct RiscVChip_s* chip = chip_collection[0];
	int cnt = 0;
	// printf( "Looking for chip with this signature: %08x\n", chip_id );
	while(chip) {
		if ((chip_id >> 16) == chip->family_id && (chip_id & 0xfff0) == chip->model_id) break;
		chip = chip_collection[cnt++];
	}
	return chip;
}

const struct RiscVChip_s* FindChipISP(uint16_t chip_id)
{
	const struct RiscVChip_s* chip = chip_collection[0];
	int cnt = 0;
	// printf( "Looking for chip with this signature: %08x\n", chip_id );
	while(chip) {
		if ( (chip_id & 0xff00) == (chip->isp_id_mask & 0xff00) && ((chip_id & chip->isp_id_mask) == chip_id)) break;
		chip = chip_collection[cnt++];
	}
	return chip;
}

uint32_t getMemoryEnd(const struct RiscVChip_s * chip, enum MemoryArea area)
{
	if (area == DEFAULT_AREA) return 0;
	return (&chip->flash_offset)[(area-1)*2] + (&chip->flash_size)[(area-1)*2];
}
